How to Avoid "No Such File or Directory" Error for 'Make Clean' Makefile Target

How to avoid No such file or directory Error for `make clean` Makefile target

Use rm -f (or even better $(RM), provided by built-in make rules, which can be found out using make -p) instead of rm in your cleanrule.

Makefile - How to hide no such file or directory errors while cleaning?

Use the -f option to rm. That option tells rm to ignore non-existent files and not prompt for confirmation.

clean:
    rm -f $(objects) $(debug_objects) solution solution.gdb

Makefile | Cleaning up after Make - Error: No such file or directory | Error: recipe for target * failed

You are adding find *.o -type f -deletefind *.o -type f -delete and the other cleanup commands as arguments to g++. Put ; between commands. Example:

linux: Main.o CHARACTER.o ATTRIBUTES.o
        g++ Main.o CHARACTER.o ATTRIBUTES.o -o bin/release/Player.sh ;
        clean

Note that this target, linux, doesn't actually produce a linux file. It will produce a binary file called bin/release/Player.sh which is a really bad name for a binary file. .sh is usually reserved for shell scripts.

make: *** [clean] Error 1 and No rule to make target errors

First, the commands to build a target in a make file don't go on the same line as the target name, but on the following lines with a tab in front of each... so the gcc -0 $(efile) <$(ofile)> is in the wrong place.

Second, the angle brackets in the directions were probably not meant to actually appear in your command.

Also, if a target requires other targets to be built first, those targets should be listed as dependencies after the target name, separated from it by a colon.

And, the option to specify the output file for gcc is -o rather than -0.

So your all target becomes:

all: $(ofile)
    gcc -o $(efile) $(ofile)

The error when running make clean occurred because the files it tried to delete didn't exist, as a successful build hadn't been done. Adding the "force" option for rm causes it to "ignore nonexistent files and arguments, never prompt", so that the command succeeds even when the files are missing and make doesn't complain. So that becomes:

clean:
    rm -f $(ofile) $(efile)

Note though that usually individual programs and libraries built with the makefile each have their own targets, and "all" usually just depends on each of them so that all of them get built... so using the "all" target as you have is a bit unusual.

Unable to `make clean`: No rule to make target ...Plo

re-run configure with the --disable-dependency-tracking option

Im getting a makefile error file(dot)o no such file or directory. Is there any way to fix this?

^{Converting comments into an answer.}

You link simple_testerv2 with deq.o but don’t tell make that you’re going to do so. Add a dependency deq.o there too (and remove the unnecessary dependency on deq_tester.o).

simple_testerv2: simple_testerv2.o deq.o 
   $(CC) $(CFLAGS) -o simple_testerv2 simple_testerv2.o deq.o

Consider whether macros can help more:

PROG2 = simple_testerv2
OBJ2  = simple_testerv2.o deq.o

${PROG2}: ${OBJ2}
    ${CC} ${CFLAGS} -o $@ ${OBJ2}

You could add ${PROG2} to the list of programs that are built by your all target (provided you move the all target after the macro is defined).

Note that your compilation lines should not try compiling deq.h. The file will be included when the source file is compiled. (Hence: change $(CC) $(CFLAGS) -c deq.c deq.h to $(CC) $(CFLAGS) -c deq.c, etc.) Indeed, you don't really need to specify the compile line at all; make knows how to convert a .c file into a .o file. So you could write:

deq_tester.o: deq.h
deq.o: deq.h
simple_testerv2.o: deq.h

That tells make that the files include the header (so if the header changes, the object files need to be recompiled). Make has built-in rules that tell it to build xyz.o from xyz.c so you don't need to tell it about that dependency (though there's no harm done if you do add the source file dependency).

Makefile: No such file or directory for target file

Your assumption is correct. Your recipe is trying to use xPlatST as a source. Change the -c into a -o in your rule:

${CXX} ${CXXFLAGS} ${INCLUDES} -o $@ ${OBJS} ${LIBS}

The -c flag tells the compiler to take all files, compile, and assemble them into an object file (.o). The -o flag specifies the destination file.

checking if a.out exists then remove with make clean otherwise do try to remove -- Makefile

The usual way of doing it is to remove by force:

clean:
    rm -f parser a.out 

From rm manpage:

-f, --force

ignore nonexistent files and arguments, never prompt

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