How to Pass an Environment Variable to a Netbeans Makefile on Ubuntu

How do I pass an environment variable to a Netbeans Makefile on Ubuntu?

Edit:

This answer is possibly not valid for Unity-based flavours of Ubuntu.


The issue is actually nothing to do with NetBeans - it's related to the Ubuntu (ie Gnome) Launcher.

As this blog post explains, you need to add variables to the rather obscure ~/.gnomerc (No Mercy? :) file in order for them to be passed to applications started with Launcher!

So just edit ~/.gnomerc and add the variables as you would to ~/.bashrc, eg:

export MYVAR="xyz"

and logout/login.

Netbeans environment variables for C++ makefile

I'll just describe what I usually do when I work with C++ in NetBeans. At first, for each project I create a simple makefile like this:

MAIN = <my main target>
CFLAGS = -g -std=c++0x

include ${MAKELIBHOME}/MINGW32.inc
include ${MAKELIBHOME}/WINDOWS.inc

build: ${MAIN}

clean:; rm -fr <files to remove>

The environment variable MAKELIBHOME is set outside of NetBeans. The directory ${MAKELIBHOME} contains a number of include files for the make, for example the file MINGW32.inc looks like this:

CC = g++

CFLAGS += -W -DLITTLE_ENDIAN=1
LDLIBS += -lws2_32

.SUFFIXES: .o .c .cpp

.c: ;${CC} ${CFLAGS} ${LDFLAGS} $< -o latest ${LDLIBS}
.cpp: ;${CC} ${CFLAGS} ${LDFLAGS} $< -o latest ${LDLIBS}

.c.o: ;${CC} ${CFLAGS} -c $<
.cpp.o: ;${CC} ${CFLAGS} -c $<

These inc-files are the same for all NetBeans projects. There are no absolute paths here, so the make will use the PATH variable to locate a GCC toolset, but of course you can use absolute paths to choose the toolset you like (or include a different inc-file - I'd prefer this way).

All this works on my Windows machine, but the Linux configuration looks very similar - I just need to include another set of inc-files to all my main makefiles. Also, this setup allows me to call the make from the command line.

I hope it helps,
~AY

netbeans doesnt read .bashrc from remote machine ( linux) which is required for compile

for any shell that we get it from kernel, locally or remotely, bashrc, run automatically, so ,as i review .bashrc, again, its a problem related to a line of .bashrc file no Netbeans ,that solved finally

Make file echo displaying $PATH string

In the manual for GNU make, they talk about this specific example when describing the value function:

The value function provides a way for you to use the value of a
variable without having it expanded. Please note that this does not
undo expansions which have already occurred; for example if you create
a simply expanded variable its value is expanded during the
definition; in that case the value function will return the same
result as using the variable directly.

The syntax of the value function is:

 $(value variable)

Note that variable is the name of a variable; not a reference to that variable. Therefore you would not normally use
a ‘$’ or parentheses when writing it. (You can, however, use a
variable reference in the name if you want the name not to be a
constant.)

The result of this function is a string containing the value of
variable, without any expansion occurring. For example, in this
makefile:

 FOO = $PATH

all:
@echo $(FOO)
@echo $(value FOO)

The first output line would be ATH, since the “$P” would be expanded as a make variable, while the second
output line would be the current value of your $PATH environment
variable, since the value function avoided the expansion.

How to source a script in a Makefile?

To answer the question as asked: you can't.

The basic issue is that a child process can not alter the parent's environment. The shell gets around this by not forking a new process when source'ing, but just running those commands in the current incarnation of the shell. That works fine, but make is not /bin/sh (or whatever shell your script is for) and does not understand that language (aside from the bits they have in common).

Chris Dodd and Foo Bah have addressed one possible workaround, so I'll suggest another (assuming you are running GNU make): post-process the shell script into make compatible text and include the result:

shell-variable-setter.make: shell-varaible-setter.sh
postprocess.py @^

# ...
else
include shell-variable-setter.make
endif

messy details left as an exercise.

NetBeans generated Makefile ignores test return codes

It turns out that NetBeans (up to version 8 at least) cannot support this. What I did to work around it is to do make build-tests rather than make test in Jenkins, followed by a loop over all the generated test files (TestFiles/f* in the build directory) to run them.

This is a major shortcoming in NetBeans' Makefile generator, as it is fundamentally incompatible with running tests outside of NetBeans itself. Thanks to @HEKTO for the link which led me to this page about writing NetBeans testing plugins: http://wiki.netbeans.org/CND69UnitTestsPluginTutotial

What that page tells you is basically that NetBeans relies on parsing the textual output of tests to determine success or failure. What it doesn't tell you is that NetBeans generates defective Makefiles which ignore critical failures in tests, including aborts, segmentation faults, assertion failures, uncaught exceptions, etc. It assumes you will use a test framework that it knows about (which is only CppUnit), or manually write magic strings at the right moments in your test programs.

I thought about taking the time to write a NetBeans unit test plugin for the Boost Unit Test Framework, but it won't help Jenkins at all: the plugins are only used when tests are run inside NetBeans itself, to display pretty status indicators.

No access to environment variables while remote compiling using Code::Blocks, plink and makefiles

According to this stackoverflow post and this fixunix post I could figure out, that plink doesn't execute startup scripts as it is the case, when you connect via putty. So I realized that Code::Blocks was innocent concerning my difficulties while trying to remote compile.

In my case, I had to explicitly source the login script ~/.login to have access to my environment variables. For the make command this would for example mean:

$make -X -ssh user@linux_server -pw my_great_password "source ~/.login;make -f $makefile" -C /path/to/my/makefile

This way a managed to remote compile my software. To start the application, I added a post-build step:

cmd /c "C:\Program^ Files\PuTTY\putty.exe -load my_session -pw my_great_password"

In the password, I had to escape an ampersand character: ^& (by the way, there are many reasons to use a private key instead of a hardcoded password). This loads a stored PuTTY session, which has the following remote command(s):

source ~/.login;/path/to/my/application/my_application;$<

I'm using the C shell. Therefore I used $< to wait for an user input (enter key). Now I can compile and run my application by hitting the build button. Hope this helps others to configure Code::Blocks for remote compilation. Just leave a comment if you're facing further problems or if you want to provide additional information/advice.



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