Makefile Enforce Library Dependency Ordering

GNU make - enforcing target order

Make is entirely built around the concept of dependencies. You are simply not using it that way.

If an executable depends on a library, then you should list that library in the prerequisites list of the executable. I can't give you a relevant example because you don't provide any details about the contents of dep_lib or dep_bin above, but for example:

exe1 : exe1.o liblib1.a liblib2.a

etc. Now, exe1 won't attempt to be linked until after the liblib1.a and liblib2.a targets have been created.

Parallel makefile requires dependency ordering

My preference is for

release:
    $(MAKE) clean
    $(MAKE) test1

This forces the two targets to be made consecutively without disturbing their inner parallelism (if any).

In what order prerequisites will be made by the GNU make?

Sure, if I use make -j a, they might all get built at the same time (depending on whether b, c, d, or e in turn have other/interrelated dependencies).

forcing order of prerequisites in Makefiles

Have T2 as an order-only prerequisite:

T1: x y z | T2
    $(MAKE) -j $^;
    # Make will run the T2 rule before this one, but T2 will not appear in $^

Make file possible accidental order-only dependency?

Unfortunately the answer had nothing to do with make. As far as I can tell the filesystem is the real culprit. Several people were experiencing success with the build but I was not. The difference between our systems which were using a common build environment was that I was building on an ext3 filesystem while they were using an ext4 filesystem.

Since ext3 does not support sub-1s timestamps (ext4 does) in some cases when the rule was invoked with only a few CPP files they were being compiled in the same second that the archive was updated by a previous invocation and everything was ending up with the same timestamps. Copying the directory over to an ext4 filesystem fixed the issue.

The real fix is to write a proper set of make rules but at least we have an answer as to why it was working for everyone but me.

Makefile (Auto-Dependency Generation)

Newer versions of GCC have an -MP option which can be used with -MD. I simply added -MP and -MD to the CPPFLAGS variable for my project (I did not write a custom recipe for compiling C++) and added an "-include $(SRC:.cpp=.d)" line.

Using -MD and -MP gives a dependency file which includes both the dependencies (without having to use some weird sed) and dummy targets (so that deleting header files will not cause errors).

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